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CM30171: Compilers

[Page last updated: 27 October 2020]

Follow this link for further information on academic years Academic Year: 2020/1
Further information on owning departmentsOwning Department/School: Department of Computer Science
Further information on credits Credits: 6      [equivalent to 12 CATS credits]
Further information on notional study hours Notional Study Hours: 120
Further information on unit levels Level: Honours (FHEQ level 6)
Further information on teaching periods Period:
Semester 1
Further information on unit assessment Assessment Summary: CW 75%, EX 25%
Further information on unit assessment Assessment Detail:
  • Coursework (CW 75%)
  • Examination (EX 25%)
Further information on supplementary assessment Supplementary Assessment:
CM30171 OTHER - Re do the Coursework (where allowed by programme regulations)
Further information on requisites Requisites: Before taking this module you are advised to take CM20217 AND take CM20256
Description: Aims:
To acquire an appreciation of the suitability of different techniques for the analysis of and representations for programming languages, followed by the various means to interpret them. To demonstrate the impact that computer architecture is having on compiler design. To explore trends in hardware development, and examine techniques for efficient use of machine resources.

Learning Outcomes:
1. To be able to choose suitable techniques for lexing, parsing, type analysis, intermediate representation, transformation and interpretation given the properties of the language to be implemented.
2. To be able to describe the philosophy of RISC and CISC architectures.
3. Knowledge of at least one technique for register allocation, and one technique for instruction scheduling.
4. The ability to write a simple code generator.

Problem solving (T/F, A).

Construction of lexical analysers, recursive descent parsing, construction of LR parser tables, type checking, polymorphic type synthesis, abstract interpretation, storage management, byte-code interpreters, code-threaded interpreters, partial evaluation, staging transformations.
Description of several state-of-the-art chip designs. The implications for compilers of RISC architectures. Register allocation algorithms (colouring, DAGS, scheduling). Global data-flow analysis. Pipelines and instruction scheduling; delayed branches and loads. Multiple instruction issue. VLIW and the Bulldog compiler. Harvard architecture and Caches. Benchmarking.
Further information on programme availabilityProgramme availability:

CM30171 is Optional on the following programmes:

Department of Computer Science
  • USCM-AFB06 : BSc(Hons) Computer Science (Year 3)
  • USCM-AAB07 : BSc(Hons) Computer Science with Study year abroad (Year 4)
  • USCM-AKB07 : BSc(Hons) Computer Science with Year long work placement (Year 4)
  • USCM-AFB09 : BSc(Hons) Computer Science with Business (Year 3)
  • USCM-AAB10 : BSc(Hons) Computer Science with Business with Study year abroad (Year 4)
  • USCM-AKB10 : BSc(Hons) Computer Science with Business with Year long work placement (Year 4)
  • USCM-AFM01 : MComp(Hons) Computer Science (Year 3)
  • USCM-AAM02 : MComp(Hons) Computer Science with Study year abroad (Year 3)
  • USCM-AKM02 : MComp(Hons) Computer Science with Year long work placement (Year 3)


  • This unit catalogue is applicable for the 2020/21 academic year only. Students continuing their studies into 2021/22 and beyond should not assume that this unit will be available in future years in the format displayed here for 2020/21.
  • Programmes and units are subject to change in accordance with normal University procedures.
  • Availability of units will be subject to constraints such as staff availability, minimum and maximum group sizes, and timetabling factors as well as a student's ability to meet any pre-requisite rules.
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